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</style><table class="sidebar nomobile nowraplinks" style="width:20em"><tbody><tr><td class="sidebar-pretitle">Part of a series of articles on</td></tr><tr><th class="sidebar-title-with-pretitle"><a href="Nanoelectronics" title="Nanoelectronics">Nanoelectronics</a></th></tr><tr><th class="sidebar-heading">
Single-molecule electronics</th></tr><tr><td class="sidebar-content">
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<li><a href="Molecular_logic_gate" title="Molecular logic gate">Molecular logic gate</a></li>
<li><a href="Molecular_wire" title="Molecular wire">Molecular wires</a></li></ul>
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Solid-state nanoelectronics</th></tr><tr><td class="sidebar-content">
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<ul><li><a href="Nanocircuitry" title="Nanocircuitry">Nanocircuitry</a></li>
<li><a href="Nanowire" title="Nanowire">Nanowires</a></li>
<li><a href="Nanolithography" title="Nanolithography">Nanolithography</a></li>
<li><a href="Nanoelectromechanical_systems" title="Nanoelectromechanical systems">NEMS</a></li>
<li><a href="Nanosensor" title="Nanosensor">Nanosensor</a></li>
<li><a href="Moore's_law" title="Moore's law">Moore's law</a></li>

<li><a href="Semiconductor_device_fabrication" title="Semiconductor device fabrication">Semiconductor device fabrication</a></li>
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<p>A <b>multigate device</b>, <b>multi-gate MOSFET</b> or <b>multi-gate field-effect transistor</b> (<b>MuGFET</b>) refers to a <a href="Metal%E2%80%93oxide%E2%80%93semiconductor_field-effect_transistor" class="mw-redirect" title="Metal–oxide–semiconductor field-effect transistor">metal–oxide–semiconductor field-effect transistor</a> (MOSFET) that has more than one <a href="Gate_(transistor)" class="mw-redirect" title="Gate (transistor)">gate</a> on a single transistor. The multiple gates may be controlled by a single gate electrode, wherein the multiple gate surfaces act electrically as a single gate, or by independent gate electrodes. A multigate device employing independent gate electrodes is sometimes called a <b>multiple-independent-gate field-effect transistor</b> (<b>MIGFET</b>). The most widely used multi-gate devices are the <a href="FinFET" class="mw-redirect" title="FinFET">FinFET</a> (fin field-effect transistor) and the <a href="#GAAFET">GAAFET</a> (gate-all-around field-effect transistor), which are non-planar transistors, or <b>3D transistors</b>.
</p><p>Multi-gate <a href="Transistor" title="Transistor">transistors</a> are one of the several strategies being developed by <a href="MOSFET" title="MOSFET">MOS</a> <a href="Semiconductor" title="Semiconductor">semiconductor</a> manufacturers to create ever-smaller <a href="Microprocessors" class="mw-redirect" title="Microprocessors">microprocessors</a> and <a href="Memory_cell_(computing)" title="Memory cell (computing)">memory cells</a>, colloquially referred to as extending <a href="Moore's_law" title="Moore's law">Moore's law</a> (in its narrow, specific version concerning density scaling, exclusive of its careless historical conflation with <a href="Dennard_scaling" title="Dennard scaling">Dennard scaling</a>).<sup id="cite_ref-1" class="reference"><a href="#cite_note-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup> Development efforts into multigate transistors have been reported by the <a href="Electrotechnical_Laboratory" class="mw-redirect" title="Electrotechnical Laboratory">Electrotechnical Laboratory</a>, <a href="Toshiba" title="Toshiba">Toshiba</a>, <a href="Grenoble_INP" class="mw-redirect" title="Grenoble INP">Grenoble INP</a>, <a href="Hitachi" title="Hitachi">Hitachi</a>, <a href="IBM" title="IBM">IBM</a>, <a href="TSMC" title="TSMC">TSMC</a>, <a href="University_of_California%2C_Berkeley" title="University of California, Berkeley">UC Berkeley</a>, <a href="Infineon_Technologies" title="Infineon Technologies">Infineon Technologies</a>, <a href="Intel" title="Intel">Intel</a>, <a href="Advanced_Micro_Devices" class="mw-redirect" title="Advanced Micro Devices">AMD</a>, <a href="Samsung_Electronics" title="Samsung Electronics">Samsung Electronics</a>, <a href="KAIST" title="KAIST">KAIST</a>, <a href="Freescale_Semiconductor" title="Freescale Semiconductor">Freescale Semiconductor</a>, and others, and the <a href="International_Technology_Roadmap_for_Semiconductors" title="International Technology Roadmap for Semiconductors">ITRS</a> predicted correctly that such devices will be the cornerstone of <a href="Nanoelectronics" title="Nanoelectronics">sub-32&nbsp;nm technologies</a>.<sup id="cite_ref-2" class="reference"><a href="#cite_note-2"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup> The primary roadblock to widespread implementation is manufacturability, as both <a href="Plane_(geometry)" class="mw-redirect" title="Plane (geometry)">planar</a> and non-planar designs present significant challenges, especially with respect to <a href="Photolithography" title="Photolithography">lithography</a> and patterning. Other complementary strategies for device scaling include channel <a href="Strain_Engineering" class="mw-redirect" title="Strain Engineering">strain engineering</a>, <a href="Silicon_on_Insulator" class="mw-redirect" title="Silicon on Insulator">silicon-on-insulator</a>-based technologies, and <a href="High-%CE%BA_dielectric" title="High-κ dielectric">high-κ</a>/metal gate materials.
</p><p>Dual-gate MOSFETs are commonly used in <a href="Very_high_frequency" title="Very high frequency">very high frequency</a> (VHF) mixers and in sensitive VHF front-end amplifiers. They are available from manufacturers such as <a href="Motorola" title="Motorola">Motorola</a>, <a href="NXP_Semiconductors" title="NXP Semiconductors">NXP Semiconductors</a>, and <a href="Hitachi" title="Hitachi">Hitachi</a>.<sup id="cite_ref-3" class="reference"><a href="#cite_note-3"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-4" class="reference"><a href="#cite_note-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-5" class="reference"><a href="#cite_note-5"><span class="cite-bracket">[</span>5<span class="cite-bracket">]</span></a></sup>
</p>
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<div class="mw-heading mw-heading2"><h2 id="Types">Types</h2></div>

<p>Dozens of multigate transistor variants may be found in the literature. In general, these variants may be differentiated and classified in terms of architecture (planar vs. non-planar design) and the number of channels/gates (2, 3, or 4).
</p>
<div class="mw-heading mw-heading3"><h3 id="Planar_double-gate_MOSFET_(DGMOS)">Planar double-gate MOSFET (DGMOS)</h3></div>
<p>A planar double-gate MOSFET (DGMOS) employs conventional <a href="Planar_process" title="Planar process">planar</a> (layer-by-layer) manufacturing processes to create double-gate <a href="MOSFET" title="MOSFET">MOSFET</a> (metal–oxide–semiconductor field-effect transistor) devices, avoiding more stringent <a href="Lithography" title="Lithography">lithography</a> requirements associated with non-planar, vertical transistor structures. In planar double-gate transistors the drain–source channel is sandwiched between two independently fabricated gate/gate-oxide stacks. The primary challenge in fabricating such structures is achieving satisfactory self-alignment between the upper and lower gates.<sup id="cite_ref-6" class="reference"><a href="#cite_note-6"><span class="cite-bracket">[</span>6<span class="cite-bracket">]</span></a></sup>
</p>
<div class="mw-heading mw-heading3"><h3 id="FlexFET">FlexFET</h3></div>
<p><b>FlexFET</b> is a planar, independently double-gated transistor with a <a href="Copper_interconnect" class="mw-redirect" title="Copper interconnect">damascene</a> metal top gate MOSFET and an implanted JFET bottom gate that are self-aligned in a gate trench. This device is highly scalable due to its sub-lithographic channel length; non-implanted ultra-shallow source and drain extensions; non-epi raised source and drain regions; and gate-last flow. FlexFET is a true double-gate transistor in that (1) both the top and bottom gates provide transistor operation, and (2) the operation of the gates is coupled such that the top gate operation affects the bottom gate operation and vice versa.<sup id="cite_ref-7" class="reference"><a href="#cite_note-7"><span class="cite-bracket">[</span>7<span class="cite-bracket">]</span></a></sup> FlexFET was developed and is manufactured by American Semiconductor, Inc.
</p>
<div class="mw-heading mw-heading2"><h2 id="FinFET">FinFET</h2></div>
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</style><div role="note" class="hatnote navigation-not-searchable">Main article: <a href="FinFET" class="mw-redirect" title="FinFET">FinFET</a></div>



<p><a href="FinFET" class="mw-redirect" title="FinFET">FinFET</a> (fin field-effect transistor) is a type of non-planar transistor, or "3D" transistor (not to be confused with <a href="Three-dimensional_integrated_circuit" title="Three-dimensional integrated circuit">3D microchips</a>).<sup id="cite_ref-8" class="reference"><a href="#cite_note-8"><span class="cite-bracket">[</span>8<span class="cite-bracket">]</span></a></sup> The FinFET is a variation on traditional MOSFETs distinguished by the presence of a thin silicon "fin" inversion channel on top of the substrate, allowing the gate to make two points of contact: the left and right sides of the fin. The thickness of the fin (measured in the direction from source to drain) determines the effective channel length of the device. The wrap-around gate structure provides a better electrical control over the channel and thus helps in reducing the leakage current and overcoming other <a href="Short-channel_effect" title="Short-channel effect">short-channel effects</a>.
</p><p>The first FinFET transistor type was called a <i>depleted lean-channel transistor</i> or "DELTA" transistor, which was first <a href="Semiconductor_device_fabrication" title="Semiconductor device fabrication">fabricated</a> by <a href="Hitachi" title="Hitachi">Hitachi Central Research Laboratory</a>'s Digh Hisamoto, Toru Kaga, Yoshifumi Kawamoto and Eiji Takeda in 1989.<sup id="cite_ref-9" class="reference"><a href="#cite_note-9"><span class="cite-bracket">[</span>9<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-Colinge_10-0" class="reference"><a href="#cite_note-Colinge-10"><span class="cite-bracket">[</span>10<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-11" class="reference"><a href="#cite_note-11"><span class="cite-bracket">[</span>11<span class="cite-bracket">]</span></a></sup> In the late 1990s, Digh Hisamoto began collaborating with an international team of researchers on further developing DELTA technology, including <a href="TSMC" title="TSMC">TSMC</a>'s <a href="Chenming_Hu" title="Chenming Hu">Chenming Hu</a> and a <a href="University_of_California%2C_Berkeley" title="University of California, Berkeley">UC Berkeley</a> research team including <a href="Tsu-Jae_King_Liu" title="Tsu-Jae King Liu">Tsu-Jae King Liu</a>, <a href="Jeffrey_Bokor" title="Jeffrey Bokor">Jeffrey Bokor</a>, Xuejue Huang, Leland Chang, Nick Lindert, S. Ahmed, Cyrus Tabery, Yang-Kyu Choi, Pushkar Ranade, Sriram Balasubramanian, A. Agarwal and M. Ameen. In 1998, the team developed the first <a href="N-channel" class="mw-redirect" title="N-channel">N-channel</a> FinFETs and successfully fabricated devices down to a 17<span class="nowrap">&nbsp;</span>nm process. The following year, they developed the first <a href="P-channel" class="mw-redirect" title="P-channel">P-channel</a> FinFETs.<sup id="cite_ref-Liu_12-0" class="reference"><a href="#cite_note-Liu-12"><span class="cite-bracket">[</span>12<span class="cite-bracket">]</span></a></sup> They coined the term "FinFET" (fin field-effect transistor) in a December 2000 paper.<sup id="cite_ref-13" class="reference"><a href="#cite_note-13"><span class="cite-bracket">[</span>13<span class="cite-bracket">]</span></a></sup>
</p><p>In current usage the term FinFET has a less precise definition. Among <a href="Microprocessor" title="Microprocessor">microprocessor</a> manufacturers, <a href="AMD" title="AMD">AMD</a>, <a href="IBM" title="IBM">IBM</a>, and <a href="Freescale" class="mw-redirect" title="Freescale">Freescale</a> describe their double-gate development efforts as FinFET<sup id="cite_ref-14" class="reference"><a href="#cite_note-14"><span class="cite-bracket">[</span>14<span class="cite-bracket">]</span></a></sup> development, whereas <a href="Intel" title="Intel">Intel</a> avoids using the term when describing their closely related tri-gate architecture.<sup id="cite_ref-15" class="reference"><a href="#cite_note-15"><span class="cite-bracket">[</span>15<span class="cite-bracket">]</span></a></sup> In the technical literature, FinFET is used somewhat generically to describe any fin-based, multigate transistor architecture regardless of number of gates. It is common for a single FinFET transistor to contain several fins, arranged side by side and all covered by the same gate, that act electrically as one, to increase drive strength and performance.<sup id="cite_ref-16" class="reference"><a href="#cite_note-16"><span class="cite-bracket">[</span>16<span class="cite-bracket">]</span></a></sup> The gate may also cover the entirety of the fin(s).
</p><p>A 25&nbsp;nm transistor operating on just 0.7&nbsp;<a href="Volt" title="Volt">volt</a> was demonstrated in December 2002 by <a href="TSMC" title="TSMC">TSMC</a> (Taiwan Semiconductor Manufacturing Company). The "Omega FinFET" design is named after the similarity between the Greek letter <a href="Omega" title="Omega">omega</a> (Ω) and the shape in which the gate wraps around the source/drain structure. It has a <a href="Gate_delay" class="mw-redirect" title="Gate delay">gate delay</a> of just 0.39&nbsp;<a href="Picosecond" title="Picosecond">picosecond</a> (ps) for the N-type transistor and 0.88&nbsp;ps for the P-type.
</p><p>In 2004, <a href="Samsung_Electronics" title="Samsung Electronics">Samsung Electronics</a> demonstrated a "Bulk FinFET" design, which made it possible to mass-produce FinFET devices. They demonstrated dynamic <a href="Random-access_memory" title="Random-access memory">random-access memory</a> (<a href="Dynamic_random-access_memory" title="Dynamic random-access memory">DRAM</a>) manufactured with a <a href="90_nanometer" class="mw-redirect" title="90 nanometer">90<span class="nowrap">&nbsp;</span>nm</a> Bulk FinFET process.<sup id="cite_ref-Liu_12-1" class="reference"><a href="#cite_note-Liu-12"><span class="cite-bracket">[</span>12<span class="cite-bracket">]</span></a></sup> In 2006, a team of Korean researchers from the <a href="KAIST" title="KAIST">Korea Advanced Institute of Science and Technology</a> (KAIST) and the National Nano Fab Center developed a <a href="3_nm" class="mw-redirect" title="3 nm">3&nbsp;nm</a> transistor, the world's smallest <a href="Nanoelectronic" class="mw-redirect" title="Nanoelectronic">nanoelectronic</a> device, based on FinFET technology.<sup id="cite_ref-17" class="reference"><a href="#cite_note-17"><span class="cite-bracket">[</span>17<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-auto_18-0" class="reference"><a href="#cite_note-auto-18"><span class="cite-bracket">[</span>18<span class="cite-bracket">]</span></a></sup> In 2011, <a href="Rice_University" title="Rice University">Rice University</a> researchers Masoud Rostami and Kartik Mohanram demonstrated that FINFETs can have two electrically independent gates, which gives circuit designers more flexibility to design with efficient, low-power gates.<sup id="cite_ref-19" class="reference"><a href="#cite_note-19"><span class="cite-bracket">[</span>19<span class="cite-bracket">]</span></a></sup>
</p><p>In 2012, Intel started using FinFETs for its future commercial devices. Leaks suggest that Intel's FinFET has an unusual shape of a triangle rather than rectangle, and it is speculated that this might be either because a triangle has a higher structural strength and can be more reliably manufactured or because a triangular prism has a higher area-to-volume ratio than a rectangular prism, thus increasing switching performance.<sup id="cite_ref-20" class="reference"><a href="#cite_note-20"><span class="cite-bracket">[</span>20<span class="cite-bracket">]</span></a></sup>
</p><p>In September 2012, <a href="GlobalFoundries" title="GlobalFoundries">GlobalFoundries</a> announced plans to offer a 14-nanometer process technology featuring FinFET three-dimensional transistors in 2014.<sup id="cite_ref-21" class="reference"><a href="#cite_note-21"><span class="cite-bracket">[</span>21<span class="cite-bracket">]</span></a></sup> The next month, the rival company <a href="TSMC" title="TSMC">TSMC</a> announced start early or "risk" production of 16&nbsp;nm FinFETs in November 2013.<sup id="cite_ref-22" class="reference"><a href="#cite_note-22"><span class="cite-bracket">[</span>22<span class="cite-bracket">]</span></a></sup>
</p><p>In March 2014, <a href="TSMC" title="TSMC">TSMC</a> announced that it is nearing implementation of several 16 nm FinFETs <a href="Die_(integrated_circuit)" title="Die (integrated circuit)">die-on</a> <a href="Wafer_(electronics)" title="Wafer (electronics)">wafers</a> <a href="Semiconductor_fabrication" class="mw-redirect" title="Semiconductor fabrication">manufacturing</a> <a href="Photolitography" class="mw-redirect" title="Photolitography">processes</a>:<sup id="cite_ref-23" class="reference"><a href="#cite_note-23"><span class="cite-bracket">[</span>23<span class="cite-bracket">]</span></a></sup>
</p>
<ul><li>16&nbsp;nm FinFET (Q4 2014),</li>
<li>16&nbsp;nm FinFET+ (<span class="clarify-content" style="padding-left:0.1em; padding-right:0.1em; color:var(--color-subtle, #54595d); border:1px solid var(--border-color-subtle, #c8ccd1);">cca</span> Q4 2014),</li>
<li>16&nbsp;nm FinFET "Turbo" (estimated in 2015–2016).</li></ul>
<p><a href="AMD" title="AMD">AMD</a> released GPUs using their Polaris chip architecture and made on 14&nbsp;nm FinFET in June 2016.<sup id="cite_ref-24" class="reference"><a href="#cite_note-24"><span class="cite-bracket">[</span>24<span class="cite-bracket">]</span></a></sup> The company has tried to produce a design to provide a "generational jump in power efficiency" while also offering stable frame rates for graphics, gaming, virtual reality, and multimedia applications.<sup id="cite_ref-25" class="reference"><a href="#cite_note-25"><span class="cite-bracket">[</span>25<span class="cite-bracket">]</span></a></sup>
</p><p>In March 2017, <a href="Samsung" title="Samsung">Samsung</a> and <a href="ESilicon" title="ESilicon">eSilicon</a> announced the <a href="Tape-out" title="Tape-out">tapeout</a> for production of a 14&nbsp;nm FinFET ASIC in a 2.5D package.<sup id="cite_ref-26" class="reference"><a href="#cite_note-26"><span class="cite-bracket">[</span>26<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-27" class="reference"><a href="#cite_note-27"><span class="cite-bracket">[</span>27<span class="cite-bracket">]</span></a></sup>
</p>
<div class="mw-heading mw-heading3"><h3 id="Tri-gate_transistor">Tri-gate transistor</h3></div>
<p>A <b>tri-gate</b> transistor, also known as a triple-gate transistor, is a type of MOSFET with a gate on three of its sides.<sup id="cite_ref-28" class="reference"><a href="#cite_note-28"><span class="cite-bracket">[</span>28<span class="cite-bracket">]</span></a></sup> A triple-gate transistor was first demonstrated in 1987, by a <a href="Toshiba" title="Toshiba">Toshiba</a> research team including K. Hieda, Fumio Horiguchi and H. Watanabe. They realized that the fully depleted (FD) body of a narrow bulk <a href="Silicon" title="Silicon">Si</a>-based transistor helped improve switching due to a reduced body-bias effect.<sup id="cite_ref-29" class="reference"><a href="#cite_note-29"><span class="cite-bracket">[</span>29<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-30" class="reference"><a href="#cite_note-30"><span class="cite-bracket">[</span>30<span class="cite-bracket">]</span></a></sup> In 1992, a triple-gate MOSFET was demonstrated by <a href="IBM" title="IBM">IBM</a> researcher Hon-Sum Wong.<sup id="cite_ref-31" class="reference"><a href="#cite_note-31"><span class="cite-bracket">[</span>31<span class="cite-bracket">]</span></a></sup>
</p><p>Intel announced this technology in September 2002.<sup id="cite_ref-32" class="reference"><a href="#cite_note-32"><span class="cite-bracket">[</span>32<span class="cite-bracket">]</span></a></sup> Intel announced "triple-gate transistors" which maximize "transistor switching performance and decreases power-wasting leakage". A year later, in September 2003, <a href="AMD" title="AMD">AMD</a> announced that it was working on similar technology at the International Conference on Solid State Devices and Materials.<sup id="cite_ref-33" class="reference"><a href="#cite_note-33"><span class="cite-bracket">[</span>33<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-34" class="reference"><a href="#cite_note-34"><span class="cite-bracket">[</span>34<span class="cite-bracket">]</span></a></sup> No further announcements of this technology were made until Intel's announcement in May 2011, although it was stated at IDF 2011, that they demonstrated a working <a href="Static_random-access_memory" title="Static random-access memory">SRAM</a> chip based on this technology at IDF 2009.<sup id="cite_ref-35" class="reference"><a href="#cite_note-35"><span class="cite-bracket">[</span>35<span class="cite-bracket">]</span></a></sup>
</p><p>On April 23, 2012, Intel released a new line of CPUs, termed <a href="Ivy_Bridge_(computer_processor)" class="mw-redirect" title="Ivy Bridge (computer processor)">Ivy Bridge</a>, which feature tri-gate transistors.<sup id="cite_ref-36" class="reference"><a href="#cite_note-36"><span class="cite-bracket">[</span>36<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-37" class="reference"><a href="#cite_note-37"><span class="cite-bracket">[</span>37<span class="cite-bracket">]</span></a></sup> Intel has been working on its tri-gate architecture since 2002, but it took until 2011 to work out mass-production issues. The new style of transistor was described on May 4, 2011, in San Francisco.<sup id="cite_ref-Ars_38-0" class="reference"><a href="#cite_note-Ars-38"><span class="cite-bracket">[</span>38<span class="cite-bracket">]</span></a></sup> It was announced that Intel's factories were expected to make upgrades over 2011 and 2012 to be able to manufacture the Ivy Bridge CPUs.<sup id="cite_ref-39" class="reference"><a href="#cite_note-39"><span class="cite-bracket">[</span>39<span class="cite-bracket">]</span></a></sup> It was announced that the new transistors would also be used in Intel's <a href="Atom_(Intel)" class="mw-redirect" title="Atom (Intel)">Atom</a> chips for low-powered devices.<sup id="cite_ref-Ars_38-1" class="reference"><a href="#cite_note-Ars-38"><span class="cite-bracket">[</span>38<span class="cite-bracket">]</span></a></sup>
</p><p>Tri-gate fabrication was used by <a href="Intel" title="Intel">Intel</a> for the non-planar transistor architecture used in <a href="Ivy_Bridge_(microarchitecture)" title="Ivy Bridge (microarchitecture)">Ivy Bridge</a>, <a href="Haswell_(microarchitecture)" title="Haswell (microarchitecture)">Haswell</a> and <a href="Skylake_(microarchitecture)" title="Skylake (microarchitecture)">Skylake</a> processors. These transistors employ a single gate stacked on top of two vertical gates (a single gate wrapped over three sides of the channel), allowing essentially three times the surface area for <a href="Electron" title="Electron">electrons</a> to travel. Intel reports that their tri-gate transistors reduce <a href="Subthreshold_leakage" class="mw-redirect" title="Subthreshold leakage">leakage</a> and consume far less <a href="Electric_power" title="Electric power">power</a> than previous transistors. This allows up to 37% higher speed or a power consumption at under 50% of the previous type of transistors used by Intel.<sup id="cite_ref-naturenews6may_40-0" class="reference"><a href="#cite_note-naturenews6may-40"><span class="cite-bracket">[</span>40<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-41" class="reference"><a href="#cite_note-41"><span class="cite-bracket">[</span>41<span class="cite-bracket">]</span></a></sup>
</p><p>Intel explains: "The additional control enables as much transistor current flowing as possible when the transistor is in the 'on' state (for performance), and as close to zero as possible when it is in the 'off' state (to minimize power), and enables the transistor to switch very quickly between the two states (again, for performance)."<sup id="cite_ref-42" class="reference"><a href="#cite_note-42"><span class="cite-bracket">[</span>42<span class="cite-bracket">]</span></a></sup> Intel has stated that all products after <a href="Sandy_Bridge" title="Sandy Bridge">Sandy Bridge</a> will be based upon this design.
</p><p>The term <i>tri-gate</i> is sometimes used generically to denote any multigate FET with three effective gates or channels.<sup id="cite_ref-43" class="reference"><a href="#cite_note-43"><span class="cite-bracket">[</span>43<span class="cite-bracket">]</span></a></sup>
</p>
<div class="mw-heading mw-heading2"><h2 id="Gate-all-around_FET_(GAAFET)">Gate-all-around FET (GAAFET)</h2></div>
<p><b>Gate-all-around FETs (GAAFETs)</b> are the successor to FinFETs, as they can work at sizes below 7&nbsp;nm. They were used by IBM to demonstrate <a href="5_nm_process" title="5 nm process">5 nm</a> process technology.
</p><p>GAAFET, also known as a surrounding-gate transistor (SGT),<sup id="cite_ref-44" class="reference"><a href="#cite_note-44"><span class="cite-bracket">[</span>44<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-Ishikawa_45-0" class="reference"><a href="#cite_note-Ishikawa-45"><span class="cite-bracket">[</span>45<span class="cite-bracket">]</span></a></sup> is similar in concept to a FinFET except that the gate material surrounds the channel region on all sides. Depending on design, gate-all-around FETs can have two or four effective gates. Gate-all-around FETs have been successfully characterized both theoretically and experimentally.<sup id="cite_ref-46" class="reference"><a href="#cite_note-46"><span class="cite-bracket">[</span>46<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-47" class="reference"><a href="#cite_note-47"><span class="cite-bracket">[</span>47<span class="cite-bracket">]</span></a></sup> They have also been successfully etched onto <a href="Nanowire" title="Nanowire">nanowires</a> of <a href="Indium_gallium_arsenide" title="Indium gallium arsenide">InGaAs</a>, which have a higher <a href="Electron_mobility" title="Electron mobility">electron mobility</a> than silicon.<sup id="cite_ref-48" class="reference"><a href="#cite_note-48"><span class="cite-bracket">[</span>48<span class="cite-bracket">]</span></a></sup>
</p><p>A gate-all-around (GAA) MOSFET was first demonstrated in 1988, by a <a href="Toshiba" title="Toshiba">Toshiba</a> research team including <a href="Fujio_Masuoka" title="Fujio Masuoka">Fujio Masuoka</a>, Hiroshi Takato, and Kazumasa Sunouchi, who demonstrated a vertical nanowire GAAFET which they called a "surrounding gate transistor" (SGT).<sup id="cite_ref-49" class="reference"><a href="#cite_note-49"><span class="cite-bracket">[</span>49<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-50" class="reference"><a href="#cite_note-50"><span class="cite-bracket">[</span>50<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-Ishikawa_45-1" class="reference"><a href="#cite_note-Ishikawa-45"><span class="cite-bracket">[</span>45<span class="cite-bracket">]</span></a></sup> Masuoka, best known as the inventor of <a href="Flash_memory" title="Flash memory">flash memory</a>, later left Toshiba and founded Unisantis Electronics in 2004 to research surrounding-gate technology along with <a href="Tohoku_University" title="Tohoku University">Tohoku University</a>.<sup id="cite_ref-51" class="reference"><a href="#cite_note-51"><span class="cite-bracket">[</span>51<span class="cite-bracket">]</span></a></sup> In 2006, a team of Korean researchers from the <a href="KAIST" title="KAIST">Korea Advanced Institute of Science and Technology</a> (KAIST) and the National Nano Fab Center developed a <a href="3_nm" class="mw-redirect" title="3 nm">3&nbsp;nm</a> transistor, the world's smallest <a href="Nanoelectronic" class="mw-redirect" title="Nanoelectronic">nanoelectronic</a> device, based on gate-all-around (GAA) FinFET technology.<sup id="cite_ref-52" class="reference"><a href="#cite_note-52"><span class="cite-bracket">[</span>52<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-auto_18-1" class="reference"><a href="#cite_note-auto-18"><span class="cite-bracket">[</span>18<span class="cite-bracket">]</span></a></sup> GAAFET transistors may make use of high-k/metal gate materials. GAAFETs with up to 7 <a href="Nanosheet" title="Nanosheet">nanosheets</a> have been demonstrated which allow for improved performance and/or reduced device footprint. The widths of the nanosheets in GAAFETs is controllable which more easily allows for the adjustment of device characteristics.<sup id="cite_ref-53" class="reference"><a href="#cite_note-53"><span class="cite-bracket">[</span>53<span class="cite-bracket">]</span></a></sup>
</p><p>As of 2020, Samsung and Intel have announced plans to mass produce GAAFET transistors (specifically MBCFET transistors) while TSMC has announced that they will continue to use FinFETs in their 3&nbsp;nm node,<sup id="cite_ref-54" class="reference"><a href="#cite_note-54"><span class="cite-bracket">[</span>54<span class="cite-bracket">]</span></a></sup> despite TSMC developing GAAFET transistors.<sup id="cite_ref-55" class="reference"><a href="#cite_note-55"><span class="cite-bracket">[</span>55<span class="cite-bracket">]</span></a></sup>
</p>
<div class="mw-heading mw-heading3"><h3 id="Multi-bridge_channel_(MBC)_FET">Multi-bridge channel (MBC) FET</h3></div>
<p>A multi-bridge channel FET (MBCFET) is similar to a GAAFET except for the use of nanosheets instead of nanowires.<sup id="cite_ref-56" class="reference"><a href="#cite_note-56"><span class="cite-bracket">[</span>56<span class="cite-bracket">]</span></a></sup> MBCFET is a word mark (trademark) registered in the U.S. to Samsung Electronics.<sup id="cite_ref-57" class="reference"><a href="#cite_note-57"><span class="cite-bracket">[</span>57<span class="cite-bracket">]</span></a></sup> Samsung plans on mass producing MBCFET transistors at the <a href="3_nm_process" title="3 nm process">3 nm</a> node for its foundry customers.<sup id="cite_ref-58" class="reference"><a href="#cite_note-58"><span class="cite-bracket">[</span>58<span class="cite-bracket">]</span></a></sup> Intel is also developing RibbonFET, a variation of MBCFET "nanoribbon" transistors.<sup id="cite_ref-59" class="reference"><a href="#cite_note-59"><span class="cite-bracket">[</span>59<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-60" class="reference"><a href="#cite_note-60"><span class="cite-bracket">[</span>60<span class="cite-bracket">]</span></a></sup> Unlike FinFETs, both the width and the number of the sheets can be varied to adjust drive strength or the amount of current the transistor can drive at a given voltage. The sheets often vary from 8 to 50 nanometers in width. The width of the nanosheets is known as Weff, or effective width.<sup id="cite_ref-61" class="reference"><a href="#cite_note-61"><span class="cite-bracket">[</span>61<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-62" class="reference"><a href="#cite_note-62"><span class="cite-bracket">[</span>62<span class="cite-bracket">]</span></a></sup>
</p>
<div class="mw-heading mw-heading2"><h2 id="Industry_need">Industry need</h2></div>
<p><a href="Planar_transistor" class="mw-redirect" title="Planar transistor">Planar transistors</a> have been the core of integrated circuits for several decades, during which the size of the individual transistors has steadily decreased. As the size decreases, planar transistors increasingly suffer from the undesirable short-channel effect, especially "off-state" leakage current, which increases the idle power required by the device.<sup id="cite_ref-63" class="reference"><a href="#cite_note-63"><span class="cite-bracket">[</span>63<span class="cite-bracket">]</span></a></sup>
</p><p>In a multigate device, the channel is surrounded by several gates on multiple surfaces. Thus it provides better electrical control over the channel, allowing more effective suppression of "off-state" leakage current. Multiple gates also allow enhanced current in the "on" state, also known as drive current. Multigate transistors also provide a better analog performance due to a higher intrinsic gain and lower channel length modulation.<sup id="cite_ref-64" class="reference"><a href="#cite_note-64"><span class="cite-bracket">[</span>64<span class="cite-bracket">]</span></a></sup> These advantages translate to lower power consumption and enhanced device performance. Nonplanar devices are also more compact than conventional planar transistors, enabling higher transistor density which translates to smaller overall microelectronics.
</p>
<div class="mw-heading mw-heading3"><h3 id="Integration_challenges">Integration challenges</h3></div>
<p>The primary challenges to integrating nonplanar multigate devices into conventional semiconductor manufacturing processes include:
</p>
<ul><li>Fabrication of a thin silicon "fin" tens of nanometers wide</li>
<li>Fabrication of matched gates on multiple sides of the fin</li></ul>
<div class="mw-heading mw-heading2"><h2 id="Compact_modeling">Compact modeling</h2></div>

<p>BSIMCMG106.0.0,<sup id="cite_ref-65" class="reference"><a href="#cite_note-65"><span class="cite-bracket">[</span>65<span class="cite-bracket">]</span></a></sup> officially released on March 1, 2012 by UC Berkeley <a href="BSIM" title="BSIM">BSIM Group</a>, is the first standard model for FinFETs. BSIM-CMG is implemented in <a href="Verilog-A" title="Verilog-A">Verilog-A</a>. Physical surface-potential-based formulations are derived for both intrinsic and extrinsic models with finite body doping. The surface potentials at the source and drain ends are solved analytically with poly-depletion and quantum mechanical effects. The effect of finite body doping is captured through a perturbation approach. The analytic surface potential solution agrees closely with the 2-D device simulation results. If the channel doping concentration is low enough to be neglected, computational efficiency can be further improved by a setting a specific flag (COREMOD = 1).
</p><p>All of the important multi-gate (MG) transistor behavior is captured by this model. Volume inversion is included in the solution of <a href="Poisson's_equation" title="Poisson's equation">Poisson's equation</a>, hence the subsequent I–V formulation automatically captures the volume-inversion effect. Analysis of electrostatic potential in the body of MG MOSFETs provided a model equation for short-channel effects (SCE). The extra electrostatic control from the end gates (top/bottom gates) (triple or quadruple-gate) is also captured in the short-channel model.
</p>
<div class="mw-heading mw-heading2"><h2 id="See_also">See also</h2></div>
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<ul><li><a href="Three-dimensional_integrated_circuit" title="Three-dimensional integrated circuit">Three-dimensional integrated circuit</a></li>
<li><a href="Semiconductor_device" title="Semiconductor device">Semiconductor device</a></li>
<li><a href="Clock_gating" title="Clock gating">Clock gating</a></li>
<li><a href="High-%CE%BA_dielectric" title="High-κ dielectric">High-κ dielectric</a></li>
<li><a href="Next-generation_lithography" title="Next-generation lithography">Next-generation lithography</a></li>
<li><a href="Extreme_ultraviolet_lithography" title="Extreme ultraviolet lithography">Extreme ultraviolet lithography</a></li>
<li><a href="Immersion_lithography" title="Immersion lithography">Immersion lithography</a></li>
<li><a href="Strain_engineering" title="Strain engineering">Strain engineering</a></li>
<li><a href="Very_large_scale_integration" class="mw-redirect" title="Very large scale integration">Very large scale integration</a> (VLSI)</li>
<li><a href="Neuromorphic_engineering" class="mw-redirect" title="Neuromorphic engineering">Neuromorphic engineering</a></li>
<li><a href="Bit_slicing" title="Bit slicing">Bit slicing</a></li>
<li><a href="3D_printing" title="3D printing">3D printing</a></li>
<li><a href="Silicon_on_insulator" title="Silicon on insulator">Silicon on insulator</a> (SOI)</li>
<li><a href="MOSFET" title="MOSFET">MOSFET</a></li>
<li><a href="Floating-gate_MOSFET" title="Floating-gate MOSFET">Floating-gate MOSFET</a></li>
<li><a href="Transistor" title="Transistor">Transistor</a></li>
<li><a href="BSIM" title="BSIM">BSIM</a></li>
<li><a href="High-electron-mobility_transistor" title="High-electron-mobility transistor">High-electron-mobility transistor</a></li>
<li><a href="Field-effect_transistor" title="Field-effect transistor">Field-effect transistor</a></li>
<li><a href="JFET" title="JFET">JFET</a></li>
<li><a href="Tetrode_transistor" title="Tetrode transistor">Tetrode transistor</a></li>
<li><a href="Pentode_transistor" title="Pentode transistor">Pentode transistor</a></li>
<li><a href="Memristor" title="Memristor">Memristor</a></li>
<li><a href="Quantum_circuit" title="Quantum circuit">Quantum circuit</a></li>
<li><a href="Quantum_logic_gate" title="Quantum logic gate">Quantum logic gate</a></li>
<li><a href="Transistor_model" title="Transistor model">Transistor model</a></li>
<li><a href="Die_shrink" title="Die shrink">Die shrink</a></li></ul>
</div>
<div class="mw-heading mw-heading2"><h2 id="References">References</h2></div>
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.mw-parser-output .reflist{margin-bottom:0.5em;list-style-type:decimal}@media screen{.mw-parser-output .reflist{font-size:90%}}.mw-parser-output .reflist .references{font-size:100%;margin-bottom:0;list-style-type:inherit}.mw-parser-output .reflist-columns-2{column-width:30em}.mw-parser-output .reflist-columns-3{column-width:25em}.mw-parser-output .reflist-columns{margin-top:0.3em}.mw-parser-output .reflist-columns ol{margin-top:0}.mw-parser-output .reflist-columns li{page-break-inside:avoid;break-inside:avoid-column}.mw-parser-output .reflist-upper-alpha{list-style-type:upper-alpha}.mw-parser-output .reflist-upper-roman{list-style-type:upper-roman}.mw-parser-output .reflist-lower-alpha{list-style-type:lower-alpha}.mw-parser-output .reflist-lower-greek{list-style-type:lower-greek}.mw-parser-output .reflist-lower-roman{list-style-type:lower-roman}


/* end https://en.wikipedia.org/ */
</style><div class="reflist reflist-columns references-column-width" style="column-width: 30em;">
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/* start https://en.wikipedia.org/ */


.mw-parser-output cite.citation{font-style:inherit;word-wrap:break-word}.mw-parser-output .citation q{quotes:"\"""\"""'""'"}.mw-parser-output .citation:target{background-color:rgba(0,127,255,0.133)}.mw-parser-output .id-lock-free.id-lock-free a{background:url("./mw/Lock-green.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-limited.id-lock-limited a,.mw-parser-output .id-lock-registration.id-lock-registration a{background:url("./mw/Lock-gray-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .id-lock-subscription.id-lock-subscription a{background:url("./mw/Lock-red-alt-2.svg")right 0.1em center/9px no-repeat}.mw-parser-output .cs1-ws-icon a{background:url("./mw/Wikisource-logo.svg")right 0.1em center/12px no-repeat}body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-free a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-limited a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-registration a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .id-lock-subscription a,body:not(.skin-timeless):not(.skin-minerva) .mw-parser-output .cs1-ws-icon a{background-size:contain;padding:0 1em 0 0}.mw-parser-output .cs1-code{color:inherit;background:inherit;border:none;padding:inherit}.mw-parser-output .cs1-hidden-error{display:none;color:var(--color-error,#d33)}.mw-parser-output .cs1-visible-error{color:var(--color-error,#d33)}.mw-parser-output .cs1-maint{display:none;color:#085;margin-left:0.3em}.mw-parser-output .cs1-kern-left{padding-left:0.2em}.mw-parser-output .cs1-kern-right{padding-right:0.2em}.mw-parser-output .citation .mw-selflink{font-weight:inherit}@media screen{.mw-parser-output .cs1-format{font-size:95%}html.skin-theme-clientpref-night .mw-parser-output .cs1-maint{color:#18911f}}@media screen and (prefers-color-scheme:dark){html.skin-theme-clientpref-os .mw-parser-output .cs1-maint{color:#18911f}}


/* end https://en.wikipedia.org/ */
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<li id="cite_note-60"><span class="mw-cite-backlink"><b><a href="#cite_ref-60">^</a></b></span> <span class="reference-text"><cite id="CITEREFCutress" class="citation web cs1">Cutress, Dr Ian. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20200622131625/https://www.anandtech.com/show/15865/intel-to-use-nanowirenanoribbon-transistors-in-volume-in-five-years">"Intel to use Nanowire/Nanoribbon Transistors in Volume 'in Five Years'"</a>. <i>www.anandtech.com</i>. Archived from <a rel="nofollow" class="external text" href="https://www.anandtech.com/show/15865/intel-to-use-nanowirenanoribbon-transistors-in-volume-in-five-years">the original</a> on June 22, 2020.</cite></span>
</li>
<li id="cite_note-61"><span class="mw-cite-backlink"><b><a href="#cite_ref-61">^</a></b></span> <span class="reference-text"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://spectrum.ieee.org/samsungs-3nm-tech-shows-nanosheet-transistor-advantage">"Samsung's 3-nm Tech Shows Nanosheet Transistor Advantage - IEEE Spectrum"</a>.</cite></span>
</li>
<li id="cite_note-62"><span class="mw-cite-backlink"><b><a href="#cite_ref-62">^</a></b></span> <span class="reference-text"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://spectrum.ieee.org/nanosheets-ibms-path-to-5nanometer-transistors">"Nanosheets: IBM's Path to 5-Nanometer Transistors - IEEE Spectrum"</a>.</cite></span>
</li>
<li id="cite_note-63"><span class="mw-cite-backlink"><b><a href="#cite_ref-63">^</a></b></span> <span class="reference-text"><cite id="CITEREFSubramanian_V2010" class="citation journal cs1">Subramanian V (2010). <a rel="nofollow" class="external text" href="https://web.archive.org/web/20120323162150/http://www.tr.ietejournals.org/article.asp?issn=0256-4602%3Byear%3D2010%3Bvolume%3D27%3Bissue%3D6%3Bspage%3D446%3Bepage%3D454%3Baulast%3DSubramanian">"Multiple gate field-effect transistors for future CMOS technologies"</a>. <i>IETE Technical Review</i>. <b>27</b> (6): <span class="nowrap">446–</span>454. <a href="Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<span class="id-lock-free" title="Freely accessible"><a rel="nofollow" class="external text" href="https://doi.org/10.4103%2F0256-4602.72582">10.4103/0256-4602.72582</a></span> (inactive 12 July 2025). Archived from <span class="id-lock-subscription" title="Paid subscription required"><a rel="nofollow" class="external text" href="http://www.tr.ietejournals.org/article.asp?issn=0256-4602;year=2010;volume=27;issue=6;spage=446;epage=454;aulast=Subramanian">the original</a></span> on March 23, 2012.</cite><span class="cs1-maint citation-comment"><code class="cs1-code">{{cite journal}}</code>: CS1 maint: DOI inactive as of July 2025 (link)</span></span>
</li>
<li id="cite_note-64"><span class="mw-cite-backlink"><b><a href="#cite_ref-64">^</a></b></span> <span class="reference-text"><cite id="CITEREFSubramanian2005" class="citation book cs1">Subramanian (5 Dec 2005). "Device and circuit-level analog performance trade-offs: A comparative study of planar bulk FETs versus FinFETs". <i>IEEE International Electron Devices Meeting, 2005. IEDM Technical Digest</i>. pp.&nbsp;<span class="nowrap">898–</span>901. <a href="Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.1109%2FIEDM.2005.1609503">10.1109/IEDM.2005.1609503</a>. <a href="ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a>&nbsp;<bdi>0-7803-9268-X</bdi>. <a href="S2CID_(identifier)" class="mw-redirect" title="S2CID (identifier)">S2CID</a>&nbsp;<a rel="nofollow" class="external text" href="https://api.semanticscholar.org/CorpusID:32683938">32683938</a>.</cite></span>
</li>
<li id="cite_note-65"><span class="mw-cite-backlink"><b><a href="#cite_ref-65">^</a></b></span> <span class="reference-text"><cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://web.archive.org/web/20120721225549/http://www-device.eecs.berkeley.edu/bsim/?page=BSIMCMG">"BSIMCMG Model"</a>. UC Berkeley. Archived from <a rel="nofollow" class="external text" href="http://www-device.eecs.berkeley.edu/bsim/?page=BSIMCMG">the original</a> on 2012-07-21.</cite></span>
</li>
</ol></div>
<div class="mw-heading mw-heading2"><h2 id="External_links">External links</h2></div>
<ul><li><a rel="nofollow" class="external text" href="https://web.archive.org/web/20061015230550/http://www.freescale.com/webapp/sps/site/overview.jsp?nodeId=0ST287482180CAE">Inverted T-FET (Freescale Semiconductor)</a></li>
<li><a rel="nofollow" class="external text" href="https://web.archive.org/web/20070929100107/http://www.eetimes.com/story/OEG20021210S0002">Omega FinFET (TSMC)</a></li>
<li><a rel="nofollow" class="external text" href="https://web.archive.org/web/20090430113707/http://www.intel.com/technology/silicon/integrated_cmos.htm">Tri-Gate transistor (Intel Corp.)</a></li>
<li><a rel="nofollow" class="external text" href="https://web.archive.org/web/20081218203055/http://www.americansemi.com/Flexfet.html">Flexfet Transistor (American Semiconductor)</a></li>
<li><a rel="nofollow" class="external text" href="https://www.youtube.com/watch?v=YIkMaQJSyP8">Intel video explaining 3D ("Tri-Gate") chip and transistor design used in 22&nbsp;nm architecture of Ivy Bridge</a></li></ul>
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</style></div><div role="navigation" class="navbox" aria-labelledby="Electronic_components254" style="padding:3px"><table class="nowraplinks mw-collapsible mw-collapsed navbox-inner" style="border-spacing:0;background:transparent;color:inherit"><tbody><tr><th scope="col" class="navbox-title" colspan="2"><div id="Electronic_components254" style="font-size:114%;margin:0 4em"><a href="Electronic_component" title="Electronic component">Electronic components</a></div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%;text-align:center;"><a href="Semiconductor_device" title="Semiconductor device">Semiconductor<br>devices</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%"><a href="MOSFET" title="MOSFET">MOS <br>transistors</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Transistor" title="Transistor">Transistor</a></li>
<li><a href="NMOS_logic" title="NMOS logic">NMOS</a></li>
<li><a href="PMOS_logic" title="PMOS logic">PMOS</a></li>
<li><a href="BiCMOS" title="BiCMOS">BiCMOS</a></li>
<li><a href="Bio-FET" title="Bio-FET">BioFET</a></li>
<li><a href="Chemical_field-effect_transistor" title="Chemical field-effect transistor">Chemical field-effect transistor</a> (ChemFET)</li>
<li><a href="CMOS" title="CMOS">Complementary MOS</a> (CMOS)</li>
<li><a href="Depletion-load_NMOS_logic" title="Depletion-load NMOS logic">Depletion-load NMOS</a></li>
<li><a href="FinFET" class="mw-redirect" title="FinFET">Fin field-effect transistor</a> (FinFET)</li>
<li><a href="Floating-gate_MOSFET" title="Floating-gate MOSFET">Floating-gate MOSFET</a> (FGMOS)</li>
<li><a href="Insulated-gate_bipolar_transistor" title="Insulated-gate bipolar transistor">Insulated-gate bipolar transistor</a> (IGBT)</li>
<li><a href="ISFET" title="ISFET">ISFET</a></li>
<li><a href="LDMOS" title="LDMOS">LDMOS</a></li>
<li><a href="MOSFET" title="MOSFET">MOS field-effect transistor</a> (MOSFET)</li>
<li> (MuGFET)</li>
<li><a href="Power_MOSFET" title="Power MOSFET">Power MOSFET</a></li>
<li><a href="Thin-film_transistor" title="Thin-film transistor">Thin-film transistor</a> (TFT)</li>
<li><a href="VMOS" title="VMOS">VMOS</a></li>
<li><a href="Power_MOSFET#UMOS" title="Power MOSFET">UMOS</a></li></ul>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Transistor" title="Transistor">Other <br>transistors</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Bipolar_junction_transistor" title="Bipolar junction transistor">Bipolar junction transistor</a> (BJT)</li>
<li><a href="Darlington_transistor" title="Darlington transistor">Darlington transistor</a></li>
<li><a href="Diffused_junction_transistor" title="Diffused junction transistor">Diffused junction transistor</a></li>
<li><a href="Field-effect_transistor" title="Field-effect transistor">Field-effect transistor</a> (FET)
<ul><li><a href="JFET" title="JFET">Junction Gate FET (JFET)</a></li>
<li><a href="Organic_field-effect_transistor" title="Organic field-effect transistor">Organic FET (OFET)</a></li></ul></li>
<li><a href="Light-emitting_transistor" title="Light-emitting transistor">Light-emitting transistor</a> (LET)
<ul><li><a href="Organic_light-emitting_transistor" title="Organic light-emitting transistor">Organic LET (OLET)</a></li></ul></li>
<li><a href="Pentode_transistor" title="Pentode transistor">Pentode transistor</a></li>
<li><a href="Point-contact_transistor" title="Point-contact transistor">Point-contact transistor</a></li>
<li><a href="Programmable_unijunction_transistor" title="Programmable unijunction transistor">Programmable unijunction transistor</a> (PUT)</li>
<li><a href="Static_induction_transistor" title="Static induction transistor">Static induction transistor</a> (SIT)</li>
<li><a href="Tetrode_transistor" title="Tetrode transistor">Tetrode transistor</a></li>
<li><a href="Unijunction_transistor" title="Unijunction transistor">Unijunction transistor</a> (UJT)</li></ul>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Diode" title="Diode">Diodes</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Avalanche_diode" title="Avalanche diode">Avalanche diode</a></li>
<li><a href="Constant-current_diode" title="Constant-current diode">Constant-current diode</a> (CLD, CRD)</li>
<li><a href="Gunn_diode" title="Gunn diode">Gunn diode</a></li>
<li><a href="Laser_diode" title="Laser diode">Laser diode</a> (LD)</li>
<li><a href="Light-emitting_diode" title="Light-emitting diode">Light-emitting diode</a> (LED)</li>
<li><a href="OLED" title="OLED">Organic light-emitting diode</a> (OLED)</li>
<li><a href="Photodiode" title="Photodiode">Photodiode</a></li>
<li><a href="PIN_diode" title="PIN diode">PIN diode</a></li>
<li><a href="Schottky_diode" title="Schottky diode">Schottky diode</a></li>
<li><a href="Step_recovery_diode" title="Step recovery diode">Step recovery diode</a></li>
<li><a href="Zener_diode" title="Zener diode">Zener diode</a></li></ul>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Other <br>devices</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Printed_electronics" title="Printed electronics">Printed electronics</a></li>
<li><a href="Printed_circuit_board" title="Printed circuit board">Printed circuit board</a></li>
<li><a href="DIAC" title="DIAC">DIAC</a></li>
<li><a href="Heterostructure_barrier_varactor" title="Heterostructure barrier varactor">Heterostructure barrier varactor</a></li>
<li><a href="Integrated_circuit" title="Integrated circuit">Integrated circuit</a> (IC)</li>
<li><a href="Hybrid_integrated_circuit" title="Hybrid integrated circuit">Hybrid integrated circuit</a></li>
<li><a href="Light_emitting_capacitor" class="mw-redirect" title="Light emitting capacitor">Light emitting capacitor</a> (LEC)</li>
<li><a href="Memistor" title="Memistor">Memistor</a></li>
<li><a href="Memristor" title="Memristor">Memristor</a></li>
<li><a href="Memtransistor" title="Memtransistor">Memtransistor</a></li>
<li><a href="Memory_cell_(computing)" title="Memory cell (computing)">Memory cell</a></li>
<li><a href="Metal-oxide_varistor" class="mw-redirect" title="Metal-oxide varistor">Metal-oxide varistor</a> (MOV)</li>
<li><a href="Mixed-signal_integrated_circuit" title="Mixed-signal integrated circuit">Mixed-signal integrated circuit</a></li>
<li><a href="MOS_integrated_circuit" class="mw-redirect" title="MOS integrated circuit">MOS integrated circuit</a> (MOS IC)</li>
<li><a href="Organic_semiconductor" title="Organic semiconductor">Organic semiconductor</a></li>
<li><a href="Photodetector" title="Photodetector">Photodetector</a></li>
<li><a href="Quantum_circuit" title="Quantum circuit">Quantum circuit</a></li>
<li><a href="RF_CMOS" title="RF CMOS">RF CMOS</a></li>
<li><a href="Silicon_controlled_rectifier" title="Silicon controlled rectifier">Silicon controlled rectifier</a> (SCR)</li>
<li><a href="Solaristor" title="Solaristor">Solaristor</a></li>
<li><a href="Static_induction_thyristor" title="Static induction thyristor">Static induction thyristor</a> (SITh)</li>
<li><a href="Three-dimensional_integrated_circuit" title="Three-dimensional integrated circuit">Three-dimensional integrated circuit</a> (3D IC)</li>
<li><a href="Thyristor" title="Thyristor">Thyristor</a></li>
<li><a href="Trancitor" title="Trancitor">Trancitor</a></li>
<li><a href="TRIAC" title="TRIAC">TRIAC</a></li>
<li><a href="Varicap" title="Varicap">Varicap</a></li></ul>
</div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%;text-align:center;"><a href="Voltage_regulator" title="Voltage regulator">Voltage regulators</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Linear_regulator" title="Linear regulator">Linear regulator</a></li>
<li><a href="Low-dropout_regulator" title="Low-dropout regulator">Low-dropout regulator</a></li>
<li><a href="Switching_regulator" class="mw-redirect" title="Switching regulator">Switching regulator</a></li>
<li><a href="Buck_converter" title="Buck converter">Buck</a></li>
<li><a href="Boost_converter" title="Boost converter">Boost</a></li>
<li><a href="Buck%E2%80%93boost_converter" title="Buck–boost converter">Buck–boost</a></li>
<li><a href="Split-pi_topology" title="Split-pi topology">Split-pi</a></li>
<li><a href="%C4%86uk_converter" title="Ćuk converter">Ćuk</a></li>
<li><a href="Single-ended_primary-inductor_converter" title="Single-ended primary-inductor converter">SEPIC</a></li>
<li><a href="Charge_pump" title="Charge pump">Charge pump</a></li>
<li><a href="Switched_capacitor" title="Switched capacitor">Switched capacitor</a></li></ul>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%;text-align:center;"><a href="Vacuum_tube" title="Vacuum tube">Vacuum tubes</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Acorn_tube" title="Acorn tube">Acorn tube</a></li>
<li><a href="Audion" title="Audion">Audion</a></li>
<li><a href="Beam_tetrode" title="Beam tetrode">Beam tetrode</a></li>
<li><a href="Hot-wire_barretter" title="Hot-wire barretter">Barretter</a></li>
<li><a href="Compactron" title="Compactron">Compactron</a></li>
<li><a href="Vacuum_diode" class="mw-redirect" title="Vacuum diode">Diode</a></li>
<li><a href="Fleming_valve" title="Fleming valve">Fleming valve</a></li>
<li><a href="Neutron_generator" title="Neutron generator">Neutron tube</a></li>
<li><a href="Nonode" title="Nonode">Nonode</a></li>
<li><a href="Nuvistor" title="Nuvistor">Nuvistor</a></li>
<li><a href="Pentagrid_converter" title="Pentagrid converter">Pentagrid</a> (Hexode, Heptode, Octode)</li>
<li><a href="Pentode" title="Pentode">Pentode</a></li>
<li><a href="Photomultiplier_tube" title="Photomultiplier tube">Photomultiplier</a></li>
<li><a href="Phototube" title="Phototube">Phototube</a></li>
<li><a href="Tetrode" title="Tetrode">Tetrode</a></li>
<li><a href="Triode" title="Triode">Triode</a></li></ul>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%;text-align:center;"><a href="Vacuum_tube" title="Vacuum tube">Vacuum tubes</a> (<a href="Electromagnetic_radiation" title="Electromagnetic radiation">RF</a>)</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Backward-wave_oscillator" title="Backward-wave oscillator">Backward-wave oscillator</a> (BWO)</li>
<li><a href="Cavity_magnetron" title="Cavity magnetron">Cavity magnetron</a></li>
<li><a href="Crossed-field_amplifier" title="Crossed-field amplifier">Crossed-field amplifier</a> (CFA)</li>
<li><a href="Gyrotron" title="Gyrotron">Gyrotron</a></li>
<li><a href="Inductive_output_tube" title="Inductive output tube">Inductive output tube</a> (IOT)</li>
<li><a href="Klystron" title="Klystron">Klystron</a></li>
<li><a href="Maser" title="Maser">Maser</a></li>
<li><a href="Sutton_tube" title="Sutton tube">Sutton tube</a></li>
<li><a href="Traveling-wave_tube" title="Traveling-wave tube">Traveling-wave tube</a> (TWT)</li>
<li><a href="X-ray_tube" title="X-ray tube">X-ray tube</a></li></ul>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%;text-align:center;"><a href="Cathode-ray_tube" title="Cathode-ray tube">Cathode-ray tubes</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Beam_deflection_tube" title="Beam deflection tube">Beam deflection tube</a></li>
<li><a href="Charactron" title="Charactron">Charactron</a></li>
<li><a href="Iconoscope" title="Iconoscope">Iconoscope</a></li>
<li><a href="Magic_eye_tube" title="Magic eye tube">Magic eye tube</a></li>
<li><a href="Monoscope" title="Monoscope">Monoscope</a></li>
<li><a href="Selectron_tube" title="Selectron tube">Selectron tube</a></li>
<li><a href="Storage_tube" title="Storage tube">Storage tube</a></li>
<li><a href="Trochotron" class="mw-redirect" title="Trochotron">Trochotron</a></li>
<li><a href="Video_camera_tube" title="Video camera tube">Video camera tube</a></li>
<li><a href="Williams_tube" title="Williams tube">Williams tube</a></li></ul>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%;text-align:center;"><a href="Gas-filled_tube" title="Gas-filled tube">Gas-filled tubes</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Cold_cathode" title="Cold cathode">Cold cathode</a></li>
<li><a href="Crossatron" title="Crossatron">Crossatron</a></li>
<li><a href="Dekatron" title="Dekatron">Dekatron</a></li>
<li><a href="Ignitron" title="Ignitron">Ignitron</a></li>
<li><a href="Krytron" title="Krytron">Krytron</a></li>
<li><a href="Mercury-arc_valve" title="Mercury-arc valve">Mercury-arc valve</a></li>
<li><a href="Neon_lamp" title="Neon lamp">Neon lamp</a></li>
<li><a href="Nixie_tube" title="Nixie tube">Nixie tube</a></li>
<li><a href="Thyratron" title="Thyratron">Thyratron</a></li>
<li><a href="Trigatron" title="Trigatron">Trigatron</a></li>
<li><a href="Voltage-regulator_tube" title="Voltage-regulator tube">Voltage-regulator tube</a></li></ul>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%;text-align:center;">Adjustable</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Potentiometer" title="Potentiometer">Potentiometer</a>
<ul><li><a href="Digital_potentiometer" title="Digital potentiometer">digital</a></li></ul></li>
<li><a href="Variable_capacitor" title="Variable capacitor">Variable capacitor</a></li>
<li><a href="Varicap" title="Varicap">Varicap</a></li></ul>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%;text-align:center;">Passive</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li>Connector
<ul><li><a href="Audio_and_video_interfaces_and_connectors" title="Audio and video interfaces and connectors">audio and video</a></li>
<li><a href="AC_power_plugs_and_sockets" title="AC power plugs and sockets">electrical power</a></li>
<li><a href="RF_connector" title="RF connector">RF</a></li></ul></li>
<li><a href="Electrolytic_detector" title="Electrolytic detector">Electrolytic detector</a></li>
<li><a href="Ferrite_core" title="Ferrite core">Ferrite</a></li>
<li><a href="Antifuse" title="Antifuse">Antifuse</a></li>
<li><a href="Fuse_(electrical)" title="Fuse (electrical)">Fuse</a>
<ul><li><a href="Resettable_fuse" title="Resettable fuse">resettable</a></li>
<li><a href="EFUSE" class="mw-redirect" title="EFUSE">eFUSE</a></li></ul></li>
<li><a href="Resistor" title="Resistor">Resistor</a></li>
<li><a href="Switch" title="Switch">Switch</a></li>
<li><a href="Thermistor" title="Thermistor">Thermistor</a></li>
<li><a href="Transformer" title="Transformer">Transformer</a></li>
<li><a href="Varistor" title="Varistor">Varistor</a></li>
<li><a href="Wire" title="Wire">Wire</a>
<ul><li><a href="Wollaston_wire" title="Wollaston wire">Wollaston wire</a></li></ul></li></ul>
</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%;text-align:center;"><a href="Electrical_reactance" title="Electrical reactance">Reactive</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">
<ul><li><a href="Capacitor" title="Capacitor">Capacitor</a>
<ul><li><a href="Capacitor_types" title="Capacitor types">types</a></li></ul></li>
<li><a href="Ceramic_resonator" title="Ceramic resonator">Ceramic resonator</a></li>
<li><a href="Crystal_oscillator" title="Crystal oscillator">Crystal oscillator</a></li>
<li><a href="Inductor" title="Inductor">Inductor</a></li>
<li><a href="Parametron" title="Parametron">Parametron</a></li>
<li><a href="Relay" title="Relay">Relay</a>
<ul><li><a href="Reed_relay" title="Reed relay">reed relay</a></li>
<li><a href="Mercury_relay" title="Mercury relay">mercury relay</a></li></ul></li></ul>
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